Forum Discussion
Altera_Forum
Honored Contributor
16 years agoDevice selection
Hello, I am looking for a simple glue logic solution that has about 4k D-flip flops. The glue logic just involve simple counters, shift registers, and combination logic. But I need very tigh...
Altera_Forum
Honored Contributor
16 years agoBe sure to perform static timing analysis as well.
http://www.altera.com/literature/manual/mnl_timequest_cookbook.pdf I don't think you'll have trouble meeting your 100 MHz for I/O timing. Can't say about the internal logic, for that you really need to put a design together and run the timing analysis and/or gate level simulation.