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TBake8's avatar
TBake8
Icon for New Contributor rankNew Contributor
6 years ago

Determining Failing State of Cyclone IV E Between Startup Reset and Configuration

Hi I'm developing my own FPGA board using a Cyclone IV E EP4CE10E22C8N but when I use the USB blaster JTAG, it says it cannot scan the device chain. I have measured the configuration pin voltages (nS...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Ted,

As per your input, FPGA is in the reset state because POR requirement as not met.

After device power up, the device does not release nSTATUS until VCCINT, VCCA, and VCCIO (for I/O banks in which the configuration and JTAG pins reside) are above the POR trip point of the device. VCCINT and VCCA are monitored for brown-out conditions after device power up. Check the Device handbook/Datasheet for POR.

  1. Check if power(VCCINT, VCCA & VCCIO ) signals are properly power to its respective voltage within a specific time and share its status.
  2. Can't scan JTAG chain" error when trying to configure or Auto-Detect your Cyclone IV E.
  3. Are you using a development kit or custom board?
  4. check JTAG pins, Are they connected as per guidelines.
  5. Also, check the connection between Blaster & JTAG header.

Regards

Anand