Honored Contributor
Honored ContributorHi,
--- Quote Start --- Im trying to instantiate sdram controller to my project so Im first learning how to do it, by opening a new project. --- Quote End --- Refer “Implementing and Parameterizing Memory IP” from external memory interface handbook volume 2 & using following links generate (.v or .vhd) files. https://www.youtube.com/watch?v=yeh2bk9pup8 http://www.altera.com/education/training/courses/omem1110 --- Quote Start --- Do I need all of those files? files like:"sdram_interface_s0.v", "sdram_interface_c0.v","alt_mem_ddrx_input_if.v" . And Ill be happy to know what are all of those files? are they the "Inside" of the controller ?? and all I have to deal with is :"Sdram_interface.v" file?? --- Quote End --- Yes, these are sequencer file, controller core file, memory interface file generated during “Generate Example Design”, you should deal with “Sdram_interface.v” file & instantiate this module in your project with instance name & keep all related files at one location & add them to your project when required. --- Quote Start --- Do I need anymore assignments to do? --- Quote End --- It depends upon your Top module in project. --- Quote Start --- 5.wrote to the memory:[/B][/U] I wrote to the memory using de-control panel ,and I want to check, and see if I can do a read transaction. Q: I dont really know how to do that.. I thought about doing a test bench for the file that instantiating the sdram controller module,but it doesnt make any since. --- Quote End --- To check read,write and for debug you can use signal tap. Best Regards Vikas Jathar Intel Customer Support – Engineering (Under Contract to Intel)
