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Altera_Forum's avatar
Altera_Forum
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10 years ago

Design over multiple FPGA

Hello all,

I have a big design to subdivide over multiple FPGA (Cyclone V C8, BEMICRO CV A9). One Master and n-slave that read only from master.

I have a 120 bit bus that run at 50 MHz. I want to use LVDS so following https://www.altera.com/en_us/pdfs/literature/an/an479.pdf I have:

- channels: 12

- deserialization factor: 10x

- data rate per channel: 500 MBps

Now 12 channels are 24 wires and speed is high so.. which cable/connector can I use? Maybe a custom PCB as backplane?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    There are a lot of great high-speed interconnects available. Call your local Samtec rep. They're a great company to work with and will give you good recommendations. Whether to go with cables or a backplane only you can decide based on your system requirements.