Design help options for issue...

Thank, benc. I have a better picture of the system now. I see there is usually an IP block in most examples called audio to take care of I2S clocking specifically.

But here's a new question - i've searched Intel AUDIO CORES in the documents, and have only found one with the term AUDIO in it, but the function is to imbed audio into video.

Is there an AUDIO CORE and i just missed it? Thanks,

Here is an example using an 'AUDIO' core. It's not clear if this is a Altera Intel or not.

http://www-ug.eecg.toronto.edu/msl/nios_devices/dev_audio.html

(http://www-ug.eecg.toronto.edu/msl/nios_devices/dev_audio.html)

The NIOS code just needs to poll codec, write, read, reset ready flag, so i am just guessing roughly four lines in the main.c 'while' loop.

I found these lines in terasic examples - to go with their AUDIO block in Platform Designer - these in AUDIO.c -

Write:

void AUDIO_DacFifoSetData(short ch_left, short ch_right){

AUDIO_DAC_WRITE_L(ch_left);

AUDIO_DAC_WRITE_R(ch_right);

}

Read:

void AUDIO_AdcFifoGetData(short *pch_left, short *pch_right){

*pch_left = AUDIO_ADC_READ_L();

*pch_right = AUDIO_ADC_READ_R();

}

..and these in Man.c -

AUDIO_AdcFifoGetData(&ch_left, &ch_right);

data = (ch_left << 16) | ch_right;

*pRecording++ = data;

ch_left = data >> 16;

ch_right = data & 0xFFFF;

AUDIO_DacFifoSetData(ch_left, ch_right);

These are in with many other lines, but i am hoping these are the crucial lines i need for basic read/write via NIOS, does this look likely? Thanks,