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msebb's avatar
msebb
Icon for New Contributor rankNew Contributor
4 years ago
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Design files for Application Note AN367

Hi,

There is application note < AN 367: Implementing PLL Reconfiguration in Stratix II Devices > available at:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an367.pdf

Page 31 mentions that there is a design example #3 titled < Implementing Phase Shift Stepping Using the ALTPLL_RECONFIG Design with Write Parameters>.

I can’t find the files for that design example.

Can you provide us the files or the link to download them?

Thanks

  • Farabi's avatar
    Farabi
    4 years ago

    Hi ,

    Please find the design examples for the AN 367 in attachments.

    1. Example 1 : xxx_Library_10.zip

    2. Example 2 : xxx_Library_11.zip

    3. Example 3 : xxx_Library_12.zip

    regards,
    Farabi

3 Replies

  • Farabi's avatar
    Farabi
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,

    I am Farabi to support you on this request. Please allow sometime for me get the design example. I will forward to you once I got the design example you need.

    regards,
    Farabi

    • Farabi's avatar
      Farabi
      Icon for Regular Contributor rankRegular Contributor
      4 years ago

      Hi ,

      Please find the design examples for the AN 367 in attachments.

      1. Example 1 : xxx_Library_10.zip

      2. Example 2 : xxx_Library_11.zip

      3. Example 3 : xxx_Library_12.zip

      regards,
      Farabi

      • Farabi's avatar
        Farabi
        Icon for Regular Contributor rankRegular Contributor
        4 years ago

        Hello,

        I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

        best regards,

        Farabi

        Intel FPGA Core Support Engineer