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Altera_Forum
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12 years ago

Debugging TDO on Cyclone V

Hello, I am making my first attempt at a custom Cyclone V 5CEBA4U15 board after using a rival FPGA vendor for several years, so I have probably made some rookie mistakes. The JTAG chain is bro...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Since nSTATUS is low, the FPGA is indicating some form of error. Lets assume its your power-supply ramp time for now. Try shorting nCONFIG to ground and then releasing it. If nSTATUS releases (goes high), then at least you know the FPGA is now happy with its power. Then re-try JTAG access (just use Quartus to try and detect the JTAG chain) ...

Cheers,

Dave