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Altera_Forum's avatar
Altera_Forum
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12 years ago

Debugging JTAG for cyclone III

Hi,

I have just finished my very first FPGA board, with an EP3C5E144C8N programmed by JTAG (no AS). I have attached the design in *zip.files (actually it is the old circuit, I changed thing a bit but the JTAG is the same), or the image can be found here: http://i.stack.imgur.com/2calk.png

When I used the programmer in Quartus to test JTAG, at first I received the error "no device detected". I check the voltage of the pins as followed (when there are no program loading):

TMS: GND

TDO: 2.1V

TMS: 3.3V

TDI: 3.3V

After a while, I re-loaded the program and received the error stated that JTAG Chain is in used ( and also it took very long to give a "Failed" warning)

My board has a 3.6MHz clock, and core logic of the FPGA is at 1.2V. For the the 144EQFP package, I have tried to solder the pad below the FPGA.

Would you please telling me what could happen in my case, and how can I debug the JTAG? Some told me that even when there are no clock, with appropriate configuration of JTAG, the program can still load. Is that correct?

Thanks for your help

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    One thing that's not right according to Cyclone handbook:

    --- Quote Start ---

    Do not leave the MSEL pins floating.

    --- Quote End ---

    --- Quote Start ---

    I have tried to solder the pad below the FPGA.

    --- Quote End ---

    That's in fact essential.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Thank you, I realized that I missed MSEL2 (Silly me!). But, is the TDO voltage level correct?