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The DAC on the ADA board has an update rate of 125MSPS , Which is its sampling frequency. But am not sure if the ADA board has to be clocked at that rate in case i am using the DAC.
Any information regarding the clocking of the ADA board will be helpful.
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The information you need should be in the DAC data sheet. The part is specified to run at up to 125MHz, but there is nothing to stop you running it slower.
I'd recommend starting at a lower clock frequency, so that the timing constraints are easier to meet. Then you can probe the signals and see what the actual clock-to-output delays on the board is. Then you can incrementally increase the sampling frequency (and the corresponding constraints) until you either reach 125MHz, or timing violations start to occur.
Cheers,
Dave
Honored Contributor
