Forum Discussion
Altera_Forum
Honored Contributor
17 years agoDE2 has clamp diodes and series resistors and thus (limited) TTL compatibility at the GPIO inputs. For slow and medium speed signals, additional series resistors would be meaningful to reduce the input currents. The 3.3V output level can drive TTL with no additional hardware. 5V CMOS inputs need level shifters to achieve a specified minimum high level of 3.5V.
Thus it seem to be a problem of the connected hardware rather than DE2.