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Altera_Forum's avatar
Altera_Forum
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11 years ago

DE1-SoC nios and sdram

so i've made a 16mb sdram controller to use as memory for the niosii i made in qsys, qsys is supposed to fix the clock difference itself implicit, so i just connect everything, and then connect the p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

also another thing to clear it up, that i missunderstood at first, the pll isn't supposed to be in the same component as the nios cpu... its supposed to be an external component.. then it works..