Forum Discussion
Yassine-Ca
New Contributor
1 year agoDE1 Cyclone V Verilog
Hello, I create a small project using Quartus and Platform Designer. In Platform Designer, I create NIOS II, On-Chip memory, JTAG UART and FIFO Avalon memory, I intrconnect them then I have genera...
RichardT_altera
Super Contributor
1 year agoI have fixed the link.
Regards,
Richard Tan