DE1 Cyclone V Verilog

Hi,

In the NIOS II new book, there is compatibility.

The problem was in the template in Eclipse, when I changed it to Helloworld small, the ELF file is generated.

I got these warnings on the Quartus:

Warning (10036): Verilog HDL or VHDL warning at seven_segment_display.v(18): object "display_data" assigned a value but never read
Info (12128): Elaborating entity "seven_segment_decoder" for hierarchy "seven_segment_decoder:temp_tens_decoder"
Warning (10036):............................

To share the solution with you: I just added the module that declare the system components (NIOS 2+On Chip Memory + FIFO + JTAG) in the top level module declaration with the qip file added to the project.

Here the declaration inside top level,according to my project :

temp_hum u_rdwr (
.clk_clk(clk),
);

Regards.

Yassine