Forum Discussion
Yassine-Ca
New Contributor
1 year agoDE1 Cyclone V Verilog
Hello, I create a small project using Quartus and Platform Designer. In Platform Designer, I create NIOS II, On-Chip memory, JTAG UART and FIFO Avalon memory, I intrconnect them then I have genera...
Yassine-Ca
New Contributor
1 year agoHi,
Have you the link to download the version?.
Regards.
Yassine-Ca
New Contributor
1 year agoHi,
I installed eclipse, now it's OK.
I will procced to BSP files.
Regards.