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Altera_Forum
Honored Contributor
Honored ContributorDE0-Nano Accelerometer code help (almost there)
Can anyone spot the problem with my VHDL-code please? I pasted it at the pastebin because it was over 1000 lines:rolleyes: http://pastebin.com/draraqr7 Line 384 and 480 -- data1(7) <= ...
Altera_ForumHonored Contributor
Honored ContributorDon't understand what you mean with -- SOMETHING WRONG HERE and why the final signal assignments are commented.
Verilog Initial block is exactly represented by the initializers Daixiwen suggested. Initialization to 0 is only required for simulation purposes, hardware registers are initially zeroed without an explicite initializer.
