De-interlacing ITU-BT656 525/60 in DE2_TV

Sdram_Control_4Port u6 ( // HOST Side

.REF_CLK(OSC_27),

.CLK_18(AUD_CTRL_CLK),

.RESET_N(1'b1),

// FIFO Write Side 1

.WR1_DATA(YCbCr),

//.WR1_DATA(16'h0000),

.WR1(TV_DVAL), //Only write YCbCr of the Active region of each line

.WR1_FULL(WR1_FULL),

.WR1_ADDR(0),

//.WR1_MAX_ADDR(640*507), // 525-18

.WR1_MAX_ADDR(0), // 525-18

.WR1_LENGTH(9'h80),

.WR1_LOAD(!DLY0),

.WR1_CLK(TD_CLK),

// FIFO Read Side 1

.RD1_DATA(m1YCbCr),

.RD1(m1VGA_Read),

.RD1_ADDR(640*13), // Read odd field and bypess blanking

//.RD1_ADDR(0),

//.RD1_MAX_ADDR(640*253), // 253 - 13 = 240

.RD1_MAX_ADDR(0),

.RD1_LENGTH(9'h80),

.RD1_LOAD(!DLY0),

.RD1_CLK(OSC_27),

// FIFO Read Side 2

.RD2_DATA(m2YCbCr),

.RD2(m2VGA_Read),

.RD2_ADDR(640*267), // Read even field and bypess blanking

//.RD2_ADDR(0),

//.RD2_MAX_ADDR(640*507), //507 - 267 = 240

.RD2_MAX_ADDR(0),

.RD2_LENGTH(9'h80),

.RD2_LOAD(!DLY0),

.RD2_CLK(OSC_27),

// SDRAM Side

.SA(DRAM_ADDR),

.BA({DRAM_BA_1,DRAM_BA_0}),

.CS_N(DRAM_CS_N),

.CKE(DRAM_CKE),

.RAS_N(DRAM_RAS_N),

.CAS_N(DRAM_CAS_N),

.WE_N(DRAM_WE_N),

.DQ(DRAM_DQ),

.DQM({DRAM_UDQM,DRAM_LDQM}),

.SDR_CLK(DRAM_CLK) );

I 've tried to figure out what the problem is by modifying like the "Red" lines above. The image from camera sent out VGA should be failed since it is not written into DRAM, but it is still correct after modifying as above. It made me crazy... Could you please help me if someone know the reason ?