Forum Discussion
Ju-Ti
Occasional Contributor
Occasional ContributorDDR4 EMIF VREF pins, Arria 10
Hi, DDR4 calibration is failing intermittently on some units of our Arria 10 based product. We use Hard PHY and hard controller. Results from EMIF debug toolkit suggest it is always the per-bit writ...
Hi Ju-Ti,
"Question 1: could this non-zero VREF voltage have effect on calibration?"
- It's may and may not affect calibration process since it's supply to voltage source not to GND. As you can see, the calibration can pass after changing some parameters.
- But it's better to follow the guideline to avoid any conflict in the functionality.
"Question 2: Is it possible that Address/Command phase of calibration is disturbed due to this, and causes later rd/wr data deskewing to fail? "
- It's may not affect the calibration process because I think the alert_n is not used during the calibration.
- Besides, the alert_n signal has been terminated.
- I would say that this might not be the root cause but you can follow the recommendation for the new board.
Regards,
Adzim
Ju-TiOccasional Contributor
Occasional ContributorInterestingly, checking "Skip address/command leveling calibration" box on Diagnostics tab of parameter editor seems to make calibrations fully succesful. Just Address/command margin for CS_0 in the report changes from e.g.
; CS_0 ; -1503 to 1494 ; 153 ;
to
; CS_0 ; Uncalibrated ; 128 ;
