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Altera_Forum's avatar
Altera_Forum
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13 years ago

DDR3 Uniphy External interface

Hi, I would like to ask question regarding the interfaces of DDR3 controller. I tried to do simple ddr3_uniphy in Cyclone V GT FPGA using Qsys. After I generate the Qsys and add the symbol in...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

hi,

I had notice that if the pin name has ["any number"] Ex. dqs[1] or dqs[0], you will have no luck editing the differential pair as I did, it keeps on coming back.

I tried to change the memory_mem_ck name to memory_mem_ck[0] and do everything again to confirm. It confirms that with this ['number'] on the name, it cannot change its differential pair name on differential pair column. It will keep coming back to its original no matter how you try.