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Altera_Forum
Honored Contributor
Honored ContributorDDR3, time quest & afi_half_clk freq.
I've a project with a DDR3L SDRAM controller (quartus 15.1) , using a afi_half_clk = 350/2Mhz for the avalon the interface. The project is working, and if a compare a counter with a 125MHz and the af...
Altera_ForumHonored Contributor
Honored ContributorI forgot to comment that, at the beginning, I tested the half_rate clock freq. using two counter; one with a 125MHz clock, and another with the half_rate clk.
And the half_rate counter was faster than the 125MHz and equivalent (aprox) to 1/2 clk. So, I thought that the half_clk was 1/2 clock, instead of 1/4. Anyway I will repeat the test to confirm it.
