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Altera_Forum
Honored Contributor
Honored ContributorDDR3, time quest & afi_half_clk freq.
I've a project with a DDR3L SDRAM controller (quartus 15.1) , using a afi_half_clk = 350/2Mhz for the avalon the interface. The project is working, and if a compare a counter with a 125MHz and the af...
Altera_ForumHonored Contributor
Honored ContributorHi,
afi_half_clk depends on your controller configuration (Full-rate - or Half rate). On Full - rate controller afi_clk is half of the interface clock and afi_half_clk is interface clock/4
