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Altera_Forum
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17 years ago

ddr2 Delay Control block?

When I tried to fit my design into Cycleon II, I got an error message Error: DQS I/O pin "ddr2_dqs[0]" does not feed a Clock Delay Control block I use Altera's DDR2 controller, why does this ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

No. You're getting this error because it is a DQS pin, and it is configured as a DQS pin. Quartus therefore expects it to drive a Clock Delay Control block, but it's not.

So...

1 - Make sure you've connected all your signals correctly to the DDR2 controller in your design.

2 - You're DDR2 controller isn't getting optimized away is it? If you haven't actually connected the write and read data path to something, the whole thing will get wiped out.

Jake