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Altera_Forum
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16 years ago

DDR2 and DDR3 SDRAM High-Performance Controller

Dear all; Can I use Debug Toolkit for DDR2 SDRAM High-Performance Controller when DDR2 is controlled by Nios II processor? Can someone tell me how to use it if the answer is possible? I ...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Here is a link to the entire EMI handbook.

http://www.altera.com/literature/lit-external-memory-interface.jsp

How to read and write to the controller is explained in Volume 2 section 1 for DDR2. Its a standard avalon interface. When you generate the IP you get an example driver which via simulation can show you the required patterns as well.

The debug gui is completely separate thing for debugging your external memory interface and does not connect to the controller or the SOPC bus that you would connect Nios to, its on its own interface. I would not bother with this interface until you well understand the controller and PHY. If you you require this because your HW is broken and you need to debug, yes you can access this debug gui and nios via JTAG at the same time. The debug chapter you mention explains exactly where to add the required files. What is not clear here?

If you are debugging to this level I would first remove your nios driver and just use the example_top design provided when generating the IP.

I hope that all makes sense.