DDR input without DPA in Arria II GX

Jake

I know Stratix has that feature. Unfortunately, I need to find a way of achieving it on Arria II GX.

The PLL dynamic phase change looks promising. But I will be limited to only 8 possible phases because M=1, N=1 would make the VCO frequency same as input frequency and thus I would loose the 'fine tuning' that would have been available if my VCO frequency were higher. Do you think the following scheme can work?

** Use a PLL

** PLL ref clock is DDR input clock

** PLL in normal mode

** M=N=1

** PLL output clock is used to sample input data

** Use Dynamic Phase shifting inputs of PLL to move PLL output clock to optimum sampling position

Regards