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Altera_Forum's avatar
Altera_Forum
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15 years ago

DDIO_OUT WYSIWYG primitive error

I am new to using altera tools. I generated a high performance ddr2 controller using the megawizard and am integrating it into my design. when trying the compile my design, I am getting the following error.

:Error: The DDIO_OUT WYSIWYG primitive "......|Altera_DDRII:Altera_DDRII_inst|Altera_DDRII_controller_phy:Altera_DDRII_controller_phy_inst|Altera_DDRII_phy:Altera_DDRII_phy_inst|Altera_DDRII_phy_alt_mem_phy:Altera_DDRII_phy_alt_mem_phy_inst|Altera_DDRII_phy_alt_mem_phy_clk_reset:clk|altddio_bidir:DDR_CLK_OUT[0].ddr_clk_out_p|ddio_bidir_e4h:auto_generated|ddio_outa[0]" feeding the pin "DDR2_CLK0" has multiple fan-outs File

Any ideas ??

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Ok. I found the issue for this problem. I have multiple levels of hierarchy, and I had fixed the direction of the CLK0 and CLK0_N ports to inout in one level, but did not fix it at the higher level of design hierarchy. After the fix, I dont see the error anymore