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Altera_Forum
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16 years ago

DCLK and DATA0 connected to LVDS output instead of floating

The Cyclone II handbook says that after programming, the DCLK and DATA0 inputs should not be left floating and should therefore be connected to a logic high or low. However, it also states that th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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So what I'll do now is skip the LVDS on the FPGA and simply use LVTTL to/from the buffers.

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A much more safe solution, I think.

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Part of this can be solved (in my case) by instructing the installer not to powerup the main unit until the remote unit has been plugged in.

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Simply consider that people (and particularly hasty service guys) use to hot-plug any connector, that you won't even think of. Unfortunately, they don't confess, just return a device "defective on arrival". It can be really reassuring to make the device hot-plug capable, if ever possible.