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Altera_Forum
Honored Contributor
16 years agoDCLK and DATA0 connected to LVDS output instead of floating
The Cyclone II handbook says that after programming, the DCLK and DATA0 inputs should not be left floating and should therefore be connected to a logic high or low. However, it also states that th...
Altera_Forum
Honored Contributor
16 years agoIf you are using passive configuration mode you are driving Dclk and Data0 with a LVTTL signal during configuration, so where does the LVDS come in?
LVDS is not a LVTTL signal and although there is a schmitt-trigger input the LVDS level may fall in the intermediate zone.