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Altera_Forum
Honored Contributor
16 years agoDCLK and DATA0 connected to LVDS output instead of floating
The Cyclone II handbook says that after programming, the DCLK and DATA0 inputs should not be left floating and should therefore be connected to a logic high or low. However, it also states that th...
Altera_Forum
Honored Contributor
16 years agoJudging by the "overwelming" responserate to this question, I presume it is not easily answered unless you work at Altera, and Altera employees don't contribute to the fora. Any suggestion where I can mail/send this question to catch their attention? (No, I do not have a support contract (yet)).