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The frequency of the sine wave is going to be around 60Mhz and I will be using a 14bit DAC from Terasic (The one which is compatible to Altera Cyclone 3 FPGA starter kit with HSMC connector).
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And this DAC has a sample rate of what?
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I need to know how many samples will be ideal per cycle for a fairly clean sinewave to be seen at the scope.
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If your scope has a high bandwidth, then you will never see a 'clean' sinewave, you will see a staircase waveform that follows the sample values that you output. That is all a DAC can do. It is up to you to follow the DAC output with an analog filter to remove the frequencies that you do not want.
For example, read page 16:
http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf (
http://www.ovro.caltech.edu/%7edwh/carma_board/ad9956_tests.pdf)
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Also to represent the negative part of the sine wave, I must use 2's complement representation. Will the DAC take that into account?
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Read the DAC data sheet. There are several different binary formats. If the DAC does not accept 2's compliment, then worst case you'll just have to add an offset or flip the MSB.
Cheers,
Dave
Honored Contributor
