cyclone3 device configuration

Which I/O bank are your I/O test pins in? What VCCIO supply is connect for this bank? Then in Quartus II setting, make sure your Default Voltage is equal to this VCCIO, or individually set the test pins to this VCCIO. That may be your problem.

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I designed my board with cyclone3 EP3C25F324, and currently is debugging

the board with this device.

I just set MSEL for JTAG configuration, nCE, nconfig, nstatus... all configuration pins are set as required.

Before the all I/O has a bank VCCIO voltage , 2.5V, 3.3V, 1.8V..

and a simple combination logic for i/o test is programming through usb blaster

JTAG is working fine on the quartus2 programmer. When I check the I/O Test pins is always different voltage as like 1.0v, sometimes floating..( It is suppose to be high 3.3V or GND, because I wrote high or low on 3.3v Bank)

I tried to DEV_OE for output proper level as logic design.

When I do DEV_OE Enabled, theoutput pins are floating..

I am spending a lot of time over this behavior.

I just want to write "i" or "0" on a pin as a outpit, in jtag configuration.

could you someone help me what is wrong with this ?

Any replay would be appreciated in advance.

dolgo

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