Forum Discussion
Altera_Forum
Honored Contributor
8 years agoRefer to the 'DATA Clock' paragraphs of the 'Active Serial Configuration' section in the "cyclone v device handbook (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-v/cv_5v2.pdf)" - page 7-18.
--- Quote Start --- you can choose a 12.5, 25, 50, or 100 MHz clock under the Device and Pin Options dialog box, in the Configuration page of the Intel Quartus Prime software. --- Quote End --- The FPGA always initially clocks at 12.5MHz until it reaches a particular point in the bitstream where, if indicated, it changes to a faster speed. Cheers, Alex