Forum Discussion
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Hi, I use DIFFIO_RX sub_LVDS input of bank 4A for the serial data input and CLK3P/N of the clock input of that bank also sub_LVDS (DDR). That works nicely. You have to take care of impedance matching and a good cable or other connection. To convert the serial data stream to parallel data, ALTLVDS_RX function is used. Hope this helps. --- Quote End --- interesting applications,