Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi Dave,
thank you very much for your answer! It seems to be that it will be extra work indeed but because I'm not familiar with these transceivers, it will take a lot of extra work. The exactual design is that I must extract data from 24 subLVDS channels of serial data of 576Mbps devided in 4 groups. Each group has his own DDR clock of 288MHz. I'll have to think about it. Thank you! Marc --- Quote Start --- You can, but it will take a little extra work. Although the transceivers accept LVDS signals, they do not operate like an LVDS SERDES. The transceiver receivers contain clock-and-data recovery (CDR) units with a PLL that normally initially locks to a reference clock, and then transitions to locking to data transitions (so that the transceiver clock captures the data in the center of the eye-pattern). Since your LVDS signal has both data and clock, its likely that the data stream does not have enough transitions to guarantee the operation of the CDR. You would need to configure the transceiver CDR in lock-to-reference mode, and then use the DDR clock as the reference to the CDR PLL. Since the CDR would remain in lock-to-reference mode, the data capture is unlikely to be ideal (the received high-speed clock would not be in the center of the data eye). You can deal with this in a couple of ways; program the PLL phase-shift (via the scan-chain), or over-sample the LVDS signal, and add logic to look for the "correct" samples. Since your data stream is at the low-end of the supported data rates, you'll likely need to oversample anyway. Cheers, Dave --- Quote End ---