Hi,
In a bonded configuration, bonded channels must be placed contiguously without leaving a gap between the channels, except when the gap channel is a CMU PLL used for the bonded channels. The contiguous channels may span across many banks for bonded mode. For example, in x8 bonding, the bonded channels may span across 3 to 4 banks with the condition that there must be no gap between the channels except when the gap is due to the channel used for CMU PLL.
https://www.intel.com/content/www/us/en/docs/programmable/683586/current/transmitter-clock-network.html
Thank you
Kshitij Goel
New Contributor
