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SGlow's avatar
SGlow
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Cyclone V SoC interrupt IDs

I'm working on a bare metal application on a Cyclone V Soc. I'm making progress, but the documentation for this device seems a bit scattered. One thing I'm having trouble finding is the interrupt...
  • SGlow's avatar
    SGlow
    4 years ago

    Yes, thank you Aik Eu and Tru, I see the info now.

    It turns out that my problem was an incomplete pdf version of the manual. The pdf manual that you get when you press the download button on the on-line manual page includes this information as chapter 10. The manual I've been working from has the same name (cv_5v4) and same date (2021.07.08) but doesn't include this chapter. On the manual I've been using chapter 10 is the CoreSight debug chapter which is chapter 11 in the newer manual.

    Very strange, I thought I had gotten my pdf through the same download link a few weeks ago but perhaps I found it elsewhere.

    Anyway, I have the info I need now so thank you both very much!

    - Steve

aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi SGlow,


If it is related to the device tree interrupt value:

Example:

For HPS UART0 it is 162

For HPS UART1 it is 163


Referring to the GIC Interrupt map:

For HPS UART0 it is 194, so minus 32 will be 162

For HPS UART1 it is 195, so minus 32 will be 163


You may use the below two documents for your reference:


https://developer.arm.com/documentation/ihi0048/latest/


http://ecse324.ece.mcgill.ca/_downloads/eb3bd46aeaebdd7c592e61dbc13dc1d3/Using_GIC.pdf


Thanks.

Regards,

Aik Eu