Cyclone V SOC design upgrade from Quartus 18.1 to 20.1

The Quartus tool is installed on the PC's local drive. The project is not. It needed to be on a drive that is accessible from other PCs.

The full error log:

Warning (12019): Can't analyze file -- file //albmain/share/EngLab/StofferM/SBR_1_v18p1_good_compile_restored_in_v20p1/sld_hub.vhd is missing
Info (12021): Found 1 design units, including 1 entities, in source file db/ip/sld51cb7f85/alt_sld_fab.v
Info (12023): Found entity 1: alt_sld_fab
Info (12021): Found 1 design units, including 1 entities, in source file db/ip/sld51cb7f85/submodules/alt_sld_fab_alt_sld_fab.v
Info (12023): Found entity 1: alt_sld_fab_alt_sld_fab
Info (12021): Found 1 design units, including 1 entities, in source file db/ip/sld51cb7f85/submodules/alt_sld_fab_alt_sld_fab_ident.sv
Info (12023): Found entity 1: alt_sld_fab_alt_sld_fab_ident
Info (12021): Found 1 design units, including 1 entities, in source file db/ip/sld51cb7f85/submodules/alt_sld_fab_alt_sld_fab_presplit.sv
Info (12023): Found entity 1: alt_sld_fab_alt_sld_fab_presplit
Info (12021): Found 2 design units, including 1 entities, in source file db/ip/sld51cb7f85/submodules/alt_sld_fab_alt_sld_fab_sldfabric.vhd
Info (12022): Found design unit 1: alt_sld_fab_alt_sld_fab_sldfabric-rtl
Info (12023): Found entity 1: alt_sld_fab_alt_sld_fab_sldfabric
Info (12021): Found 1 design units, including 1 entities, in source file db/ip/sld51cb7f85/submodules/alt_sld_fab_alt_sld_fab_splitter.sv
Info (12023): Found entity 1: alt_sld_fab_alt_sld_fab_splitter
Error (10481): VHDL Use Clause error at alt_sld_fab_alt_sld_fab_sldfabric.vhd(7): design library "altera_sld" does not contain primary unit "sld_hub_pack". Verify that the primary unit exists in the library and has been successfully compiled.
Error (10800): VHDL error at alt_sld_fab_alt_sld_fab_sldfabric.vhd(7): selected name in use clause is not an expanded name
Error (10481): VHDL Use Clause error at alt_sld_fab_alt_sld_fab_sldfabric.vhd(8): design library "altera_sld" does not contain primary unit "sld_jtag_hub_pack". Verify that the primary unit exists in the library and has been successfully compiled.
Error (10800): VHDL error at alt_sld_fab_alt_sld_fab_sldfabric.vhd(8): selected name in use clause is not an expanded name
Error (10481): VHDL Use Clause error at alt_sld_fab_alt_sld_fab_sldfabric.vhd(9): design library "altera_sld" does not contain primary unit "jtag_pack". Verify that the primary unit exists in the library and has been successfully compiled.
Error (10800): VHDL error at alt_sld_fab_alt_sld_fab_sldfabric.vhd(9): selected name in use clause is not an expanded name
Warning (12241): 40 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Info (144001): Generated suppressed messages file //albmain/share/EngLab/StofferM/SBR_1_v18p1_good_compile_restored_in_v20p1/output_files/SBR_1.map.smsg
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 6 errors, 99 warnings
Error: Peak virtual memory: 5301 megabytes
Error: Processing ended: Thu May 20 10:45:46 2021
Error: Elapsed time: 00:05:49
Error: Total CPU time (on all processors): 00:05:09

Also see warnings like one shown below, which has never been the case on any other project (I wonder if the Quartus install was done correctly since I can't do it - has to be done by our IT department):

Warning (12125): Using design file db/altsyncram_7nn1.tdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info (12023): Found entity 1: altsyncram_7nn1