Forum Discussion
New ContributorCyclone V QSPI AS Configuration timing data
Hi Sudheer,
You can use the 1.5nS. That will also protect you if you need to change to EPCQ-A device in the future because the EPCQ device is EOL (https://www.mouser.com/pcn/intel_corporation_pdn1708_rev_1.0.0.pdf).
There is not much functional difference between the two. I think Intel's supplier for EPCQ shut down so they had to create a new part and called it EPCQ-A.
Thanks,
Travis
New ContributorHi Travis,
Thanks for the update.
We have gone through the documentation that you have sent. We have calculated the data setup and hold time margins at FPGA.
To calculate the setup and hold time margins at the QSPI Flash we need the minimum data hold time requirement of the FPGA (During Flash Write cycle), which we are not able to get from the datasheet.
Thanks
Sudheer
TravisCovertOccasional Contributor
Hi Sudheer,
For Flash Write operations the timing diagram should be in the flash datasheet.
Here is the timing waveform for the EPCQ flash.
Thanks,
Travis- SudheerV
Hi Travis,
Thanks for your reply. We are using EPCQ64SI16N in our product.
The read operation timing doesn't specify the minimum data hold time (after clock falling edge) requirement for data in the datasheet. Can you please help to provide this value. Datasheet gives only clock falling edge to data valid time.
Thanks
Sudheer
- TravisCovert
Hi Sudheer,
The rising edge data is in the EPCQ datasheet. The falling edge data is in the FPGA handbook, linked below.
The falling edge information is in the Cyclone V handbook. Please refer to the Device Handbook in the section on Evaluating Data Setup and Hold Timing.
Hope this helps.
Travis
