Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Cyclone V PLL outclock is zero

Hi everyone I use PLL to generate 137Mhz for my Qsys system. The inclock is 125MHz which is from on-board oscillator, but the outclock of PLL is zero, and I don't know why. :( I build my projec...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

can you be more specific.

I use signalTap and the locked signal is zero, does it mean my PLL has lost lock.