Cyclone V Hard Memory Controller:

Hi All:

I'm starting a a couple of new designs and plan on taking advantage of the Hard Memory Controllers in the Cyclone V to talk to a LPDDR ram (MT46H64M16LBF-6 specifically)

Using Quartus II 11.1 SP2, I can use the MegaWizard to specify DDR2, DDR3, etc ram controllers with the UniPhy, but not a LPDDR ram. Also I don't see a way specify I want it to use the "Hard Memory Core" vs a "Soft Memory Core" (Even though the Cyclone V handbook specifically states the

I've also checked in QSYS, and pretty much see the same thing.

Anyone know how to do this? I'm planning on using the memory controller with my own master instead of a QSYS or SOPC builder system with a cpu. So I really just need the simulation model at this point. But I want to make sure it uses the hard core vs a soft core.

Thanks

Pete