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Altera_Forum
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11 years ago

cyclone V FPGA: h2f bridge addressing

Hi,

I had another related problem with a setup between C code on Linux/HPS and the FPGA on a cyclone V SoC FPGA board. While using it via the lw_h2f bridge worked, while it didn't with the h2f bridge. I figured out I was using the wrong address.

I built my setup according to what I understand from the documentation, e.g. here

http://www.altera.com/literature/hb/cyclone-v/cv_54005.pdf

and

http://www.altera.com/literature/hb/cyclone-v/hps.html#reg_default_component/memorymap_hps.html

(http://www.altera.com/literature/hb/cyclone-v/hps.html#reg_default_component/memorymap_hps.html)

It says


FPGA Slaves Accessed Via Lightweight HPS2FPGA AXI Bridge    0xFF200000
HPS2FPGA AXI Bridge Module    0xFF500000

The same in the pdf, they're talking about a base address of 0xff500000 for the h2f axi bridge. So, I thought the hint given for the 0xc0000000 for h2f of a someone here was just a mistake. I never found this address anywhere, but 0xff500000 does not work, while the undocumented 0xc0000000 works for h2f bridges. Why is that? Has the layout changed anytime? What is then the correct address for the f2h bridge, it's documented as 0xff600000, but that's probably wrong then, too?! Anybody knows?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    0xFF50_0000 is where the control/status registers for the H2F bridge live in the memory map. So when you access those locations it's not going to be forwarded to the FPGA fabric, that's just for you to make setting changes to the bridge itself. The memory window into the FPGA is indeed located at 0xC000_0000.

    Likewise 0xFF60_0000 is where the CSRs are for the F2H bridge is located. 0xFF40_0000 is where the CSRs for the lightweight H2F bridge are located.