New Contributor
Super ContributorHi,
Check the document link below on Cyclone V configuration pins' Configuration Scheme and I/O Standard:
Check image below:
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
New ContributorThank you for your reply. I made IO standard changes in the QSF manually as I could not set them in the Pin Planner. I have the following settings for my pins, but unfortunately I'm seeing no change in the error when switching from 3.3-V LVCMOS to 3.0-V LVTTL:
set_location_assignment PIN_V3 -to flash_dclk set_location_assignment PIN_AB4 -to flash_data[0] set_location_assignment PIN_AB3 -to flash_data[1] set_location_assignment PIN_AA5 -to flash_data[2] set_location_assignment PIN_T4 -to flash_data[3] set_location_assignment PIN_R4 -to flash_cs_n set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to flash_cs_n set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to flash_dclk set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to flash_data[0] set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to flash_data[1] set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to flash_data[2] set_instance_assignment -name IO_STANDARD "3.0-V LVTTL" -to flash_data[3] set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "ACTIVE SERIAL X4" set_global_assignment -name USE_CONFIGURATION_DEVICE ON set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
