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ContributorCyclone V custom board VCCIO puzzling behavior
There are new measured data.
If I attached a simple 10k resistor to the 1.2V rail. it will drop back to normal 1.2 range.
But the loaded /w 10k is still measuring 40mV higher than unloaded DCDC w/o the FPGA chip.
So there are some leakage current inside the diode path? from VCCPD to VCCIO?
ContributorThank you, finally there is FAE or staff can handle this ticket.
1) All
2a) for a development board form factor how could you expect all slot MUST used in any situations?
So of cause the situation happens on FMC slots is not used.
2b) As mentioned even setting this cannot see the effect is removed.
So this control on the EDA is so puzzling for what purpose?
3) as mentioned in this very beginning of this ticket, the adjustable DCDC buck converter is tested w/o the FPGA is applied and no voltage raised or out-off-range measurements are found. This is introduced by the FPGA Chip itself.
### add ups
** if configurated the unused pins to ground + output.
tested the pins do load to ground.
However, the power rails shows very low different 10-5mV different yet still raised a lot from 1.2 to 1.47.
Bests,
Brian
