Forum Discussion
BrianSune_Froum
Contributor
ContributorCyclone V custom board VCCIO puzzling behavior
Dear Intel and all, I am working on Cyclone V soc 5CSEBA5U19C8N. There is a very puzzling VCCIO behavior. According to "Cyclone® V Device Family Pin Connection Guidelines PCG-01014-3.2". Any 3...
There are new measured data.
If I attached a simple 10k resistor to the 1.2V rail. it will drop back to normal 1.2 range.
But the loaded /w 10k is still measuring 40mV higher than unloaded DCDC w/o the FPGA chip.
So there are some leakage current inside the diode path? from VCCPD to VCCIO?
BrianSune_FroumContributor
Contributor@FvM
I do think this is common.
For example Kintex 7 one IO bank is completely empty on any load yet there are no such thing happened.
I think this is the inherent silicon design fault on Altera FPGA.
First got to understand the VCCPD and VCCIO what actually means rather than guessing diode etc.
I don't think the leak could introduce such result.
1.2 to 1.5 is 300mV can't explain how could it reach that level.
