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Altera_Forum
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9 years ago

Cyclone-V changing off-chip signal timing using IObuf delays

Because of routing differences in a bus system we want to experiment with input IO-buf delays of a cyclone. The D3_delay and D1_delay options in the quartus assignment editor are available but...
Altera_Forum's avatar
Altera_Forum
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9 years ago

Thanks for the reference Alex. Do you also happen to know if these figures are the range or the step size of the parameters?

Sstrell do you mean the FAST_INPUT_REGISTER assignment? Can this one be combined with an input delay like D3?