Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Cyclone V bidirectional half-duplex LVDS?

Dear All, We are designing a board with a Cyclone V connected to another (already existing) board via a bidirectional half-duplex LVDS link. We would prefer to use only 2 pins of the FPGA to im...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I understand that the Cyclone V BLVDS implementation with differential SSTL IO-standard uses the same termination resistors as the AN522 Cyclone III/IV implementation, 50 ohm near series termination and far differential 100 ohm termination at both bus ends. Optionally bias resistors.