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Altera_Forum
Honored Contributor
9 years agoCyclone V A9 DDR3 calibration fail no reboot ,but JTAG is OK
Dear All, help me analysis.
I have a custom board with cyclonev and DDR3 (mt41j256m16tw-107it. In quartus ii v15.1.0 (64bit) I created Uniphy external DDR3;when I download sof file to FPGA through JTAG, calibration is ok, ,after i program FPGA PROM, turn off the power,when turn on power, calibration fail. drr3 config as flowe: i have tried many times, the voltage supply the voltage supply is ok VddQ 1.35V VTT VREF 0.678V1 Reply
- Altera_Forum
Honored Contributor
How soon after power-up/configuration is the calibration done? Are the supplies stable at that point?
Hold the Phy in reset for longer after power-up before allowing calibration to proceed. Cheers, Alex