New Contributor
New ContributorHello sstrell, hello Fakhrul,
sorry for the late response. I was sick the last few weeks not able to get access from home.
I've attached the NiosSystem file in a first step. This was working to compile the 'Top Design'.
Unfortunately, the 'Top Design' has links with reference to many modules. Therefore, it's not possible to make one zip file to attach it, too.
I'll work on that.
Please remember, the Platform Designer was able to add a seconed QSPI Flash but compilation reports some errors.
Just for your information - my job was to replace the FPP configuration to ASx4 and to add a second QSPI Flash to further data storage.
Please refer to the attached configuration 'Config.png'.
As next step I will add a second QSPI Flash to generate the error message again.
I'll come back as soon as possible.
If you have any idea how to add it, please let me know.
Thanks for your help
Josef
New ContributorHello,
I've just added a QSPI Flash configured to disable the dedicated Active Serial interface and to enable the SPI pins interface.
The complete Nios System is in CAN.7z.
Generate HDL is working fine but synthesis of the 'Top Design CAN' has reported error in the QSPI macrofunction.
Refer to screen shot QSPI-Error.png.
Anything seems to be wrong that generatd HDL design and the macrofunction doesn't match.
VHDL file of my 'Top Design CAN' is attached too.
Do you have any idea what's the reason for this mismatch?
Thanks
Josef
