Forum Discussion
ShivaKi
New Contributor
2 years agoCyclone V 5CEBA7F27C8N LVDS Interface Design
Hello, For FPGA 5CEBA7F27C8N, LVDS Interface to be implemented. Use Case: Considered 6A Bank for LVDS Implementation. Provided 2.5V operating voltage for Bank 6A. In Quartus Prime Pin Planner too...
AqidAyman_Altera
Regular Contributor
1 year agoHi,
Can you share the steps taken for you to do the pin assignment for those differential pins in your design?
Please also provide the snapshot of the Pin Planner. It may help me to understand the cause.
Regards,
Aqid