Cyclone V - Interrupt Handling

I realized I updated the Rocketboards mailing list but not this forum post with my solution to the problem (thanks for calling me out Bram!).

I wrote the software side of things, however, I didn’t write the FPGA code that triggers the IRQ lines.

It was my desire to be able to receive FPGA -> HPS interrupts in user space, so I wrote a simple module that accomplishes that. The module creates “fpgaint” devices under /dev for each “fpgaint” node present in the device tree that has interrupt information. A user space program can then open these devices and poll/read them to get interrupt triggers. I attached a patch that adds the module I created to the 3.9 Linux tree as well as 3 example nodes to the device tree to create the IRQ devices for FPGA_HPS IRQs 0, 1 and 2. Note that this module is very simple and has a pretty extreme limitation in that only 1 user space program can receive these interrupts from a fpgaint device node at a time. If someone wanted to expand the module so that more programs can wait on the fpgaint device node and have them all wake up at each interrupt, that would be excellent. ;) Also note that this patch has a bunch of debugging printks that you should probably remove if you want to actually use this stuff.

I also attached a little test program that shows how to capture these interrupts in user space.

In order to verify this stuff, I had our FPGA guy tie the FPGA_IRQ2 line to a simple register that I can write high or low to toggle the interrupt line. Then after insmoding the fpgaint module (with a device tree node for that interrupt line present), I ran the fpgaint_test.c program on the device created for that interrupt line (/dev/fpgaint2 according to my device tree node setup). I then performed the FPGA register writes to toggle the line and saw my test program receiving the interrupts in user space.

The FPGA guy said this with respect to how we tested the interrupt interface: I routed the GPIO output register (from the HPS) to the IRQ lines. You were able to write to bits on that register and create an interrupt.

Hopefully this is helpful to the folks on the forum.