Honored Contributor
Honored ContributorThanks for sharing that solution, Dave. In my situation I'm the FPGA consultant and was not involved in the board design. I was not even aware that Cyclone IV migration required this odd conversion of I/O pins to VCCINT and GND pins until there was a problem bringing up the board due to the selected state for unused pins after configuration. After looking into this I was thinking the way to do this would be to create a separate voltage rail for the 6 migration pins that need to be tied to +1.2V on the larger device. Then have option resistors so that when the smaller device is installed that rail is tied to +3.3V (or left floating), and when the larger device is installed it's tied to +1.2V. But I think I like your approach better.
What I would really like to hear from Altera is what the downside is (if any) of just tying those 6 unused I/O pins to +1.2V as they advise. Any extra I/O current drawn on those pins when the smaller device is installed? Any potential for extra input switching noise? As long as those 6 input buffers with VCCIO at +3.3V are seeing the +1.2V input then there must be something happening in there. Starting to look like I may have to open a support ticket to get an official answer, if even then. A local FAE said he has never seen or heard of any issues with switching noise or excess current draw in Cyclone IV migration situations. Just looking for something a little more official. Best, Bob
