Hi,
For example, a Cyclone device with a -6 speed grade has a delay of 6 ns through a LUT's. Devices with low speed grade numbers run faster than devices with high speed grade numbers.
Yes you can achieve 50 MHz.
I/O standards such as 3.3, 3.0, 2.5, 1.8, or 1.5-LVTTL/LVCMOS are capable of a typical 200 MHz interfacing frequency with a 10 pF load.
Actual achievable frequency depends on design- and system-specific factors. Perform HSPICE/IBIS simulations based on your specific design and system setup to
determine the maximum achievable frequency in your system.
Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)
Honored Contributor
